viric (viric) wrote in vhdl_forum,
viric
viric
vhdl_forum

Problems with Xilinx SDF Generator

I'm using the Free WebPack ISE 7.1i, and I have problems in a step of my design. I want to simulate the "Post Place & Route" circuit of my FPGA in ModelSIM, and although all the Synthesize process goes fine, at the creation of the SDF file I get:
Read and Annotate design 'driver_motor.ncd' ..
EXCEPTION:Pds:Pds_PahFileConv.c:567:1.14 - Corrupt Database
FATAL_ERROR:Anno:DesignManager.c:427:1.20.18.1 - There were DRC violations on
   the original design in file driver_motor.ncd.   Process will terminate.  To
   resolve this error, please consult the Answers Database and other online
   resources at http://support.xilinx.com. If you need further assistance,
   please open a Webcase by clicking on the "WebCase" link at
   http://support.xilinx.com


What should I do? I registered to 'WebCase', but I think they won't give me any solution.
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